memory原理及测试介绍

　本站收集了一些memory测试资料，其中包括memory原理及测试介绍，另外包括一个测试程序的demo，以供测试工程师参考。详见如下：

Memory Testing and Pattern Introduction
　　 Brief Introduction
Memory Classification and Application
How to Test Memory IC
Pattern Introduction
Scramble
For storage media (memory):
not magnetic tape, not hard/floppy disk, not brain
For silicon process:
not WAT test, not reliability test,
not physical failure analysis
For IC testing:
not logic (ASIC, CPU, FPGA, LCD driver, …)
not mix-signal (ADC, DAC, USB, …)
For test program:
not timing, not pin format, not hardware configuration
not command to generate report, not user interface
We focus on:
electrical failure analysis, (memory IC) function test, test pattern
Volatile memory: data will lose after power off
SRAM (static random access memory):
Low Power (or Low Voltage) SRAM / High Speed SRAM
DRAM (dynamic RAM, need refresh):
Synchronous DRAM / Double Data Rate (DDR) SDRAM
FCRAM (FJ, Fast Cycle RAM): DRAM cell with SRAM peripheral
Non volatile memory: data still keep after power off
ROM (read only memory) / PROM (programmable ROM)
EPROM (Erasable PROM) / EEPROM (Electrical EPROM)
Flash
Embedded Memory :
some of above memories are merged with some logical purpose circuit on a chip
LP-SRAM: mobile phone
HS-SRAM: cache memory
DRAM: phase out
SDRAM / DDR SDRAM: mother board / graphic card
ROM / PROM / EPROM: game machine / BIOS
EEPROM / Flash: smart card / voice recorder

FCRAM(FJ): mobile phone
SRAM: typical memory function (Write and Read)
DRAM: row and column address are multiplexed, need refresh
SDRAM: need one synchronous clock, pipe-line (burst) concept
DDR SDRAM: one cycle two data, write latency, DLL on/off
FCRAM: need some test mode to access the DRAM cell
ROM: need SOM (source only memory) board of tester, read only
EEPROM / Flash: read / program / erase all / page mode
address and data are multiplexed, BUSY signal
Embedded Memory: in general, several hundreds pins, so we need customer provide more detailed or confidential document about
the memory-related, only around fifty pins information to run a
specified sequence to enter the direct access mode